Agentic AI Systems Architecture Fellow - TX, Austin, United States
Originally posted 10 August 2026 by the employer.
About the role
The Fellow will establish AMD’s technical strategy for Agentic AI while developing innovative, real-world use cases that demonstrate the capabilities of AMD platforms.
What you'll do
- Define AMD’s architectural vision and long-term technical strategy for Agentic AI through real-world use cases and early customer proof-of-concepts.
- Architect end-to-end reference architectures optimizing heterogeneous execution across AMD CPUs, GPUs, DPUs, networking, memory, and storage.
- Architect intelligent multi-agent systems and orchestration frameworks, defining optimization strategies for task decomposition, workflow scheduling, and reasoning pipelines.
- Drive architectural innovations that improve deterministic AI behavior and reliability, incorporating data governance and security practices.
- Collaborate with silicon architecture, software engineering, and AI framework teams to influence AMD’s future silicon and software roadmaps.
- Represent AMD as a recognized technical authority through customer engagements, industry conferences, and technical publications.
What you'll need
- Deep expertise spanning Agentic AI systems architecture, heterogeneous AI infrastructure, and AI performance engineering.
- Experience designing large-scale AI infrastructure, distributed AI systems, or enterprise AI architectures across heterogeneous computing platforms (CPUs, GPUs, DPUs, networking, storage).
- Understanding of modern AI software ecosystems, including ROCm™, AMD Enterprise AI, AMD Zen Software Studio, frontier foundation models, LLM inference, sglang, lmcache, RAG, and AI orchestration frameworks.
- Experience architecting Agentic AI systems, including multi-agent collaboration, orchestration frameworks, autonomous reasoning, and workflow optimization.
- Expertise in data optimization, model deployment and supporting enterprise-scale AI systems.
- Strong knowledge in AI performance engineering: latency, throughput, token efficiency, and heterogeneous resource utilization.
Nice to have
- Familiarity with trusted/secure AI practices (confidential computing, data provenance, governance).
- Recognized technical leadership through patents, publications/presentations, or open-source contributions.
- Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, Artificial Intelligence, Data Science, or a related technical discipline.
Skills: Agentic AI systems architecture, heterogeneous computing, AMD CPUs, GPUs, DPUs, AI software ecosystem, reference architectures
This role has been open 67 days — well below the 78-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
474
|
Median days open
78 d
|
Median salary
$238k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (474 roles · 65 employers) |
|---|---|---|
| Open roles in this specialty | 34 | 474 |
| Open roles in the wider Digital Design & Verification family | 251 | 3202 · 115 employers |
| Median days open | 60 d | 78 d (−18 d vs this employer) |
| Median salary (USD postings) | — | $238k |
Skills observed across this category: Agentic AI systems architecture, heterogeneous computing, AMD CPUs, GPUs, DPUs, AI software ecosystem, reference architectures
Who's hiring in this category
- Qualcomm · 75 open roles · median 85 d
- NVIDIA · 56 open roles · median 70 d
- Apple · 36 open roles · median 11 d
- AMD (this employer) · 34 open roles · median 59 d
- Arm Holdings · 27 open roles · median 114 d
- Micron Technology · 22 open roles · median 106 d
How we counted: 474 open SoC/Chip Architecture (SOC Architecture) roles from 65 employers tracked in the SemiconductorJobs index, counted 17 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.