3D Memory Chip Architect and Design, Principal Engineer
$192,000 - $288,000 USD yearly
Originally posted 25 June 2026 by the employer. Relisted by the employer on 26 August 2026.
About the role
The Qualcomm Memory System/Technology Team in Process & Package Solutions Group is seeking a Principal Engineer for AI workload mapping to memory-centric compute systems across data center, mobile, compute, and XR. You will develop algorithms and hardware architectures that move computation closer to or directly into memory to address data transfer bottlenecks between processors and memory.
What you'll do
- Architect, design, and implement scalable AI/ML computing infrastructure for data center, compute, and mobile. - Develop and optimize AI algorithms for memory-centric compute systems to improve performance and power efficiency. - Co-optimize compute, memory, and connect fabric allocation for scale-up and scale-out metrics. - Develop and validate algorithms using Python and C for throughput, latency, power, and energy targets. - Use performance modeling tools and numerical analysis techniques to evaluate system performance trade-offs.
What you'll need
- Bachelor's degree in Science, Engineering, or related field with 8+ years of ASIC design, verification, validation, integration, or related experience (or Master's with 7+ years, or PhD with 6+ years). - Experience in computer and memory architectures, including memory controller design and scalar processors. - Knowledge of AI models including CNNs, RNNs, transformers, LLM, multi-modal AI, and AI agents. - Understanding of dataflow, memory protocols, bus protocols, and compute fabrics. - Knowledge of tensor cores, near-memory computing, high-bandwidth memories such as HBM, and 2.5D/3D integration.
Nice to have
- Familiarity with in/near-memory computing architectures. - Experience with programming and scripting languages including C, C++, Python, and Perl. - Familiarity with DRAM datasheets and IO interfaces.
Skills: AI workload mapping, memory-centric compute, LLM, HBM, 3D integration
This role has been open 118 days — well above the 85-day median for AI/ML Hardware Engineering roles.
AI/ML Hardware Engineering · AI ML Hardware
|
Open roles in category
508
|
Median days open
85 d
|
Median salary
$236k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (508 roles · 76 employers) |
|---|---|---|
| Open roles in this specialty | 104 | 508 |
| Open roles in the wider Software, Firmware & Systems family | 734 | 6298 · 145 employers |
| Median days open | 113 d | 85 d (+28 d vs this employer) |
| Median salary (USD postings) | — | $236k |
Skills observed across this category: AI workload mapping, memory-centric compute, LLM, HBM, 3D integration
Who's hiring in this category
- Qualcomm (this employer) · 104 open roles · median 113 d
- NVIDIA · 91 open roles · median 57 d
- AMD · 38 open roles · median 95 d
- Micron Technology · 27 open roles · median 57 d
- Analog Devices · 18 open roles · median 40 d
- Mobileye · 18 open roles · median 85 d
How we counted: 508 open AI/ML Hardware Engineering (AI ML Hardware) roles from 76 employers tracked in the SemiconductorJobs index, counted 22 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.