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Cirrus Logic

2027 Internship - Design Verification Engineer - Austin, Texas, United States

Cirrus Logic Remote friendly (Austin, Texas, United States) Internship 27 days ago
Verification, Validation & Test

Originally posted 11 September 2026 by the employer.

About the role

This internship supports the functional verification of mixed-signal products.

What you'll do

  • Assist in verification planning and strategy development.
  • Support testbench creation, maintenance, and enhancement.
  • Contribute to failure analysis, debug, and resolution efforts.
  • Help with coverage analysis and population to ensure thorough verification.
  • Work on digital/mixed-signal modeling, directed and constraint-random test generation, and verification flow development.

What you'll need

  • Currently pursuing a MS or PhD in Electrical Engineering or a related field.
  • Strong background in Hardware Description Languages (HDLs) such as Verilog or VHDL.
  • Familiarity with Hardware Verification Languages (HVLs) like SystemVerilog/UVM, Vera, or e.
  • Solid understanding of digital design fundamentals and verification methodologies.

Skills: SystemVerilog, UVM, testbench, coverage analysis, mixed-signal modeling

Market context

This role has been open 2 days — well below the 62-day median for Design Verification roles.

Design Verification · Design Verification

Open roles in category
1206
Median days open
62 d
Median salary
$187k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Cirrus Logic compares in Design Verification hiring
Metric Cirrus Logic All employers we track in this specialty (1206 roles · 95 employers)
Open roles in this specialty 11 1206
Open roles in the wider Digital Design & Verification family 29 3184 · 113 employers
Median days open 199 d 62 d (+137 d vs this employer)
Median salary (USD postings) — $187k

Skills observed across this category: SystemVerilog, UVM, testbench, coverage analysis, mixed-signal modeling

Who's hiring in this category

  • AMD · 106 open roles · median 48 d
  • Qualcomm · 104 open roles · median 43 d
  • NVIDIA · 79 open roles · median 61 d
  • Synopsys · 64 open roles · median 30 d
  • SiFive · 55 open roles · median 65 d
  • Cadence Design Systems · 52 open roles · median 108 d

How we counted: 1206 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 8 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
Austin, Texas, United States
Hybrid
Internship
27 days ago

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